7 THE DELAY CAN BE IMPROVED BECAUSE EACH STAGE SHOULD HAVE EQUAL EFF...

4.7 The delay can be improved because each stage should have equal effort and that

effort should be about 4. This design has imbalanced delays and excessive efforts.

The path effort is F = 12 * 6 * 9 = 648. The best number of stages is 4 or 5. One way

to speed the circuit up is to add a buffer (two inverters) at the end. The gates should

be resized to bear efforts of f = 648

= 3.65 each. Now the effort delay is only D

=

5f = 18.25, as compared to 12 + 6 + 9 = 27. The parasitic delay increases by 2p

,

but this is still a substantial speedup.