9.12 This register was featured in the second edition.
Transistors N1 and N2 are added to a regular static D flip-flop. Transistor N2 is
used to prevent the master stage of the D flip-flop from writing. Setting signal
probe[j] allows node Y to be read or written via signal sense[i]. If
test_write_enable_n is true, the cell is read. If test_write_enable_n is false, the cell
may be written (providing the D flip-flop master inverter is LO-skewed). Be careful
of the single nMOS pass-gates
clknclkD QYN2N1probe[j] clkntest_write_enable_nsense[i]
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