9.10 BIST builds on scan by surrounding logic blocks with a pseudo random sequence
generator on the logic inputs and a scan chain on the output of the logic. These two
functions (in addition to the normal operation of the flip flops) may be combined
into the one structure (Figure 9.23)). BIST can reduce the number of external test
vectors needed if it is compatible with the system test methodology. It can also per-
form high-speed testing with a low-speed tester. It costs area on chip.
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