15 THE SOFTWARE RADIO CONSISTS OF AN IQ CONVERSION UNIT, FOUR MICROPROCESSORS WITH MULTIPLIERS AND FOUR MEMORIES

9.15 The software radio consists of an IQ conversion unit, four microprocessors with

multipliers and four memories. At the SOC level, we would start by adding the

required Wrapper Serial Port (WSP) to each block. The decision then may be made

as to whether a Wrapper Parallel Port (WPP) is required. This would depend on

whether the intelligence for the block could be implemented internally or externally.

On a case by case basis, let us look at each module.

The IQ conversion unit consists of an NCO and IQ multipliers. The inputs are an

I and Q signal and control values for an internal NCO. The output is the sum of the

products of the NCO and IQ inputs. The NCO (Figure 9.25) can be tested autono-

mously using a signature analyzer. It would be possible to extend this to the full

module by placing LFSRs on the I and Q inputs. A fault analysis would indicate

how many vectors would have to be run to achieve an acceptable fault coverage. So

we probably do not need a WPP here.

The microprocessor has a sequencer that can be used to set up tests autonomously.

So it probably does not need a WPP port.

The memories do not have any innate intelligence, so a WPP port may be used here

to test the memories in parallel from a central RAM test unit (not unlike the design

in the previous example). So one test unit tests four RAMs. Including the test unit

in each RAM would mean that no WPP would be required.

Overall no WPPs are required at all – the time to serially shift data in and out just

affects testing time – so they probably would go in for the RAMs.

In terms of TAM design, one could select the Daisy-chained TAM. But this is

likely to impact test time (but good if you want to minimize pin count). The local

TAM controller option is likely to be good as it minimizes pins and the local con-

trollers default to very simple circuits for the processor and IQ converter. The basic

thing here is that any of the designs work – we just want some good reasons such as

reducing test time, complexity or pin count.

Chapter 10